1. Field of the Invention
The present invention relates to semiconductor wafer cleaning and, more particularly, to apparatuses and methods for cleaning wafer edges before, during and after fabrication operations.
2. Description of the Related Art
In the semiconductor chip fabrication process, it is well-known that there is a need to clean a wafer where a fabrication operation has been performed that leaves unwanted residuals on the surface of the wafer. Examples of such a fabrication operation include plasma etching, material depositions and chemical mechanical planarization (CMP). CMP is commonly performed on both dielectric materials and conductive materials, e.g., such as oxide and copper. If particles or films are left on the surface of the wafer for subsequent fabrication operations, the unwanted residual particles or material may cause, among other things, defects such as scratches on the wafer surface and inappropriate interactions between metallization features. In some cases, such defects may cause devices on the wafer to become inoperable. In order to avoid the undue costs of discarding wafers having inoperable devices, it is therefore necessary to clean the wafer adequately yet efficiently after fabrication operations that leave unwanted residue on the surface of the wafer.
FIG. 1A shows a high level schematic diagram of a wafer cleaning system 50. The cleaning system 50 typically includes a load station 10 where a plurality of wafers in a cassette 14 may be inserted for cleaning through the system. Once the wafers are inserted into the load station 10, a wafer 12 may be taken from the cassette 14 and moved into a brush box one 16a, where the wafer 12 is scrubbed with selected chemicals and water (e.g., de-ionized (DI) water). The wafer 12 is then moved to a brush box two 16b. After the wafer has been scrubbed in the brush boxes 16, the wafer is moved into a spin, rinse, and dry (SRD) station 20 where DI water is sprayed onto the surface of the wafer and spun to dry. During the rinsing operation in the SRD station. After the wafer has been placed through the SRD station 20, the wafer is moved to an unload station 22.
FIG. 1B shows a simplified view of a cleaning process performed in brush box one 16a. In brush box one 16a, the wafer 12 having a top surface 12a (i.e., the active side) is inserted between a top brush 30a and a bottom brush 30b. The wafer 12 is capable of being rotated by holding and driving rollers (not shown) and the rotating brushes 30a and 30b to adequately clean the entire top and bottom surfaces of the wafer. After typical CMP operations, a wafer is placed into the cleaning station 50. In brush box one 16a, the top brush 30a and the bottom brush 30b are preferably concentrated with a cleaning chemical, which is received from a source 32 or other sources controlled by a chemical/DI water dispensing system (not shown).
A common fabrication operation includes the deposition of metals over previously formed dielectric features, which is commonly done in damascene and dual-damascene processes. As is generally defined, damascene and dual-damascene processes include the formation of features, such as interconnect lines and vias into dielectric materials, filling the dielectric features with conductive material, e.g., such as copper, and then performing CMP operations to remove the excess metallization material. The metal material can be formed over the wafer using various techniques, such as, for example, deposition, electroplating, sputtering, and the like.
In either case, the formation of metal material may form excess beading around the periphery of the wafer. It is also a common operation to perform standard cleaning operations after such metal deposition operations, to ensure that the excess metal and lose particles and contaminants are removed from the wafer before engaging in further processing.
A problem typically experienced is that standard brush scrubbing and edge cleaning techniques fail to clean and remove the metal edge beading and loose particles from wafer edge surfaces sufficiently well. One approach to edge cleaning was described in U.S. Pat. No. 5,861,066, entitled xe2x80x9cMethod and Apparatus for Cleaning Edges of Contaminated Substrate.xe2x80x9d This U.S. Patent is incorporated herein by reference. Although this apparatus does well at cleaning the immediate edge of the wafer, other portions of the wafer edge in which beading and particulates adhere are most commonly not sufficiently addressed. That is, although sufficient center cleaning is performed using the brushes 30 of FIG. 1B, not enough mechanical scrubbing is performed directly on the top and bottom surface areas near the edge. Consequently, edge beading particle collection will remain even after repeated conventional brush cleaning.
In view of the foregoing, there is a need for an apparatus and method for enhancing wafer edge cleaning, especially in cases of post metal deposition operations.
Broadly speaking, the present invention fills these needs by providing an improved method for cleaning semiconductor wafer edge regions. It should be appreciated that the present invention can be implemented in numerous ways, including as a process, an apparatus, a system, a device or a method. Several inventive embodiments of the present invention are described below.
In one embodiment, a substrate cleaning system is disclosed. The system includes a cleaning station having a first brush and a second brush. The second brush is oriented relative to the first brush so as to receive a flat circular substrate therebetween. The first brush and the second brush are configured to simultaneously scrub a first and second surface of the flat circular substrate. The cleaning station also includes a scrubbing roller that is configured to receive an edge of the flat circular substrate. The scrubbing roller has a scrubbing pad for scrubbing a first surface edge of the first surface, a second surface edge of the second surface, and an edge that is not part of either the first or second surface.
In another embodiment, a substrate cleaning system is disclosed. The system includes a cleaning station having a first brush and a second brush. The second brush is oriented relative to the first brush so as to receive a flat circular substrate therebetween. The first brush and the second brush are configured to simultaneously scrub a first and second surface of the flat circular substrate. The cleaning station also includes a scrubbing clamp. The scrubbing clamp is configured to receive an edge of the flat circular substrate. The scrubbing clamp has a scrubbing pad for scrubbing a first surface edge of the first surface, a second surface edge of the second surface, and an edge that is not part of either the first or second surface.
In yet another embodiment, a scrubbing roller is disclosed. The roller includes a top roller core and a bottom roller core. The top roller core and the bottom roller core define a U-shaped circular pocket. The roller further includes a scrubbing pad that is configured to line the U-shaped circular pocket. The scrubbing pad is configured to receive an edge region of a semiconductor wafer. The edge region is configured to be inserted into the U-shaped circular pocket so as to scrub a top surface region, an edge surface region and a bottom surface region of the edge region of the semiconductor wafer.
The advantages of the present invention are numerous. Most notably, the wafer edge scrub roller and clamp each are configured to locally scrub the top surface, the edge surface, and the bottom surface of the wafer along the periphery. This localized scrubbing assists in removing post metal deposition beading, removal of metal debris, loosely held metallic deposition films, and particulates. The edge scrubbing is preferably assisted by the implementation of one or more nozzles that direct cleaning fluids, such as, DI water and other know cleaning fluids directly at the edge/pad material being used for scrubbing. This localized and concentrated mechanical/chemical scrubbing of the wafer edge thus assists in providing cleaner wafers throughout the entire surface (e.g., along the edge and non-edge regions), thus improving yield for wafer cleaner end users.
Other aspects and advantages of the present invention will become apparent from the following detailed description, taken in conjunction with the accompanying drawings, illustrating by way of example the principles of the present invention.